In the current state of integrated circuit technology, reconfigurable circuits such as those that include Field Programmable Gate Arrays (FPGAs) have become valuable tools when used in various applications. For example, reconfigurable circuits have been widely used as essential components of emulation systems. Emulation systems are typically used as, for example, prototypes for circuits such as an Application Specific Integrated Circuit (ASIC). That is, rather than building a prototype of an ASIC during the design stages, which can be very expensive, an emulation system can be used instead to emulate the ASIC to be built. And because of their flexibility, reconfigurable circuits are not limited to ASIC prototyping but are used in other applications such as digital signal processing (DSP), medical imaging, computer vision, speech recognition, and so forth.
Reconfigurable circuits typically include a number of reconfigurable function blocks (or functions) that may be programmed and configured to behave and perform a variety of functions. The reconfigurable circuits will also typically include a number of reconfigurable interconnects (e.g., crossbar devices) that can be programmed to, among other things, selectively interconnect the input/outputs of the reconfigurable function blocks.
Although reconfigurable circuits have become valuable tools in some applications, such devices have been less useful in other applications. For example, the use of reconfigurable circuits in aviation, military, and space applications have been somewhat limited because reconfigurable circuits typically do not have sufficient robustness in dealing with, for example, Single Event Upset (SEU). SEUs are situations where a logic bit is flipped somewhere in a circuit as a result of, for example, a strike of a cosmic particle or in the presence of a radioactive material in the vicinity of the circuit.
To deal with such situations, circuits to be used in aviation, military, and space applications are designed to typically contain redundant logic and detection circuitry to detect the occurrence of SEUs. Optionally, such circuits may contain recovery circuitry that allows the application to go on even upon the occurrence of SEUs. Such techniques, however, cannot be used to detect and correct errors caused by SEUs in reconfigurable circuits. That is, such techniques cannot be used at the application level, i.e., by programming the reconfigurable circuit with the same redundant logic design that would have been used for a circuit design because an SEU that occurs in the configuration memory will change the function of the logic gates at the application level, which is not a kind of fault that an SEU robust design can deal with.
Accordingly, a reconfigurable circuit system that is able to detect the occurrence of errors such as those associated with SEUs and that can recover from such errors is desirable.